PROJECTS / REGISTER

The work, item by item.

This register separates research, concepts, and experiments. It does not convert intentions into products.

RTM-CPU-001

CPU Architecture Research

RESEARCH

Learning and documenting the design of a small RISC-V processing core.

AREA: COMPUTER ARCHITECTURE
OBJECTIVE: Build a grounded understanding of instruction execution, pipelines, hazards, and verification.
TECHNOLOGY: RISC-V / RTL / SIMULATION / FPGA
PROGRESS: Architecture study and experiment planning.
UPDATED: 2026
REPOSITORY: NOT PUBLISHED

RTM-OS-001

RESEARCH

Exploring the foundations of operating systems and hardware-aware software.

AREA: SYSTEMS SOFTWARE
OBJECTIVE: Study boot, scheduling, memory, drivers, and the interfaces between software and hardware.
TECHNOLOGY: RUST / C / RISC-V / QEMU
PROGRESS: Requirements and learning path defined.
UPDATED: 2026
REPOSITORY: NOT PUBLISHED

RTM-EMB-001

EXPERIMENTAL

Small hardware and firmware experiments for reliable device control.

AREA: EMBEDDED SYSTEMS
OBJECTIVE: Develop practical capability in board-level interfaces, firmware, debugging, and measurement.
TECHNOLOGY: MCU / FIRMWARE / SENSORS / PCB
PROGRESS: Initial experiment set under definition.
UPDATED: 2026
REPOSITORY: NOT PUBLISHED

RTM-AI-001

CONCEPT

Research into useful local inference within constrained computing systems.

AREA: MACHINE INTELLIGENCE
OBJECTIVE: Understand deployment constraints, privacy trade-offs, acceleration, and system integration.
TECHNOLOGY: LOCAL INFERENCE / EDGE ML / ACCELERATION
PROGRESS: Research questions documented; no product implementation yet.
UPDATED: 2026
REPOSITORY: NOT PUBLISHED