RESEARCH / INDEX
Start with better questions.
RTM Research defines the technical questions behind the experiments. Findings will be published when there is evidence worth examining.
How should low-level software expose hardware capability without creating fragile interfaces?
RESEARCHWhich measurement and debugging practices make early hardware experiments repeatable?
RESEARCHWhen does local inference materially improve privacy, latency, or reliability?
RESEARCH01 / PUBLICATION QUEUE
Planned technical notes
These records are outlines, not published findings.
ARCHITECTURE
Understanding CPU Pipelines
A planned engineering note on instruction flow, hazards, forwarding, and the costs of deeper pipelines.
DRAFTDRAFT OUTLINE
SILICON
Designing a Minimal RISC-V Core
A future build log covering ISA scope, datapath decisions, control logic, simulation, and verification.
DRAFTDRAFT OUTLINE
HARDWARE
Building Our First FPGA Prototype
A reserved publication path for a real prototype report once the hardware work has been completed.
PLANNEDNOT YET PUBLISHED
INTELLIGENCE
Exploring On-Device AI
A planned investigation of latency, memory, power, privacy, and acceleration for local inference.
DRAFTDRAFT OUTLINE