CPU architecture
Instruction execution, control, pipelines, hazards, and design trade-offs.

RTM Silicon is an early research direction focused on learning CPU and SoC design through architecture study, simulation, verification, and eventual FPGA experiments.
Instruction execution, control, pipelines, hazards, and design trade-offs.
An open ISA for structured architecture study and implementation experiments.
Interconnects, peripherals, memory, acceleration, and integration.
Caches, latency, bandwidth, hierarchy, and consistency.
Performance under practical energy and thermal constraints.
Privilege, isolation, trusted execution, and hardware attack surfaces.
Simulation, assertions, test generation, and evidence of correctness.
Purpose-built compute for graphics, AI, media, and system tasks.
The order matters: specification before implementation, and verification throughout.